Ingenieurbüro BAY9
Signal Processing and Radio Communications



The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP core replaces a real RF device between TX-DAC output and RX-ADC input.

You can test, verify, and optimize your PHY implementation in real time without having the effort of connecting a real RF device. Furthermore, it allows you to create BER/FER curves in a fast and reproducible way.

The VRF IP core offers the following features:

You can download an evaluation version below. Documentation and Verilog sources are included.